A History of The ARM Microprocessor | Dave Jaggar | Talks at Google on HackerTube: recommended by 1 Hacker News commenter across 1 month, 2020–2022.
talk · intermediate · evergreen
Dave Jaggar, who defined much of the ARM architecture, recounts how Acorn's near-extinction led to ARM, including the history of Thumb, StrongARM, and the Austin team.
HN cites it for first-hand ARM history, including Thumb's origin, and for Jaggar's endorsement of RISC-V.
“Dave Jaggar has some interesting comments on the history around DEC, StrongARM and the Austin ARM team.”
10 Hacker News comments link this video. Each one links back to its thread.
Agreed plus Thumb which got ARM into Nokia mobile phones. Dave Jaggar has some interesting comments on the history around DEC, StrongARM and the Austin ARM team. ▶ this video
in “Was Acorn's RISC OS an under-appreciated pearl of OS design?” · View on HN
Apple's investment in ARM in November 1990 (when ARM was spun out of Acorn as a joint venture between Acorn, Apple, and VLSI) was a result of Apple's decision to select ARM for the Newton sometime in 1990 since Acorn and Apple competed in the UK education market [1]. [1] ▶ this video , "A History of The ARM Microprocessor"
in “A history of ARM, part 1: Building the first chip” · View on HN
Here’s the opinion of probably THE most important ARM engineer of the 1990s and 2000s, Dave Jaggar who developed the ARM7TDMI, Thumb, Thumb2. ▶ this video Check at 51:30 where he says (bringing up the topic of RISC-V himself) “I would Google RISC-V and find out all about it. They’ve done a fine instruction set, a fine job […] it’s the state of the art now for 32-bit general purpose instruction sets. And it’s got the 16-bit compressed stuff. So, yeah, learning about that, you’re learning from the best.”
in “ARM vs. RISC-V Vector Extensions” · View on HN
There's really a lot of severely misinformed opinion there. "Much of the hype of RISC-V is hoping for laptop/desktop/server class silicon." Really? RISC-V is pitched mostly against the likes of ARM, which seems to be doing fine without laptop/desktop/server class silicon. Several RISC-V vendors are already shipping Cortex A53/A55 class CPUs, which are used as the LITTLE cores in mobile devices -- and even still the main cores in lower end mobile. Several RISC-V vendors have formally announced A72 (SiFive U84) or A73 (Alibaba C910) class cores. Alibaba is apparently using these internally already, and boards for general sale are expected this year. SiFive's U84 will probably be shipping in around 12 months from now. ARM is a few steps ahead with A75 and A76, but those are just incremental developments and RISC-V is catching up fast. It seems the article was written before the HiFive Unmatched was announced -- but I don't think it was written before the U74 CPU cores in the Unmatched were announced in October 2018, so I guess the author either wasn't paying attention, or else don't understand the standard 2 to 2.5 years from announcement of a core to shipping products using an SoC with that core. There is nothing surprising about the HiFive Unmatched. Was the article also written before Apple announced its switch to ARM64 architecture and their M1 chip? The M1 uses ARM's 64 bit instruction set, but is far ahead of anything from ARM or its other licencees in performance. If some
in “RISC-V isn't as interesting as you think” · View on HN
> RISC-V seems like it hasn’t learned anything from CPUs designed after 1991. Never mind what RISC-V says about itself. Here is Dave Jaggar, a key ARM architect, endorsing RISC-V as state of the art in 2019: ▶ this video .
in “RISC-V isn’t as interesting as you think” · View on HN
There's really a lot of severely misinformed opinion there. "Much of the hype of RISC-V is hoping for laptop/desktop/server class silicon." Really? RISC-V is pitched mostly against the likes of ARM, which seems to be doing fine without laptop/desktop/server class silicon. Several RISC-V vendors are already shipping Cortex A53/A55 class CPUs, which are used as the LITTLE cores in mobile devices -- and even still the main cores in lower end mobile. Several RISC-V vendors have formally announced A72 (SiFive U84) or A73 (Alibaba C910) class cores. Alibaba is apparently using these internally already, and boards for general sale are expected this year. SiFive's U84 will probably be shipping in around 12 months from now. ARM is a few steps ahead with A75 and A76, but those are just incremental developments and RISC-V is catching up fast. It seems the article was written before the HiFive Unmatched was announced -- but I don't think it was written before the U74 CPU cores in the Unmatched were announced in October 2018, so I guess the author either wasn't paying attention, or else don't understand the standard 2 to 2.5 years from announcement of a core to shipping products using an SoC with that core. There is nothing surprising about the HiFive Unmatched. Was the article also written before Apple announced its switch to ARM64 architecture and their M1 chip? The M1 uses ARM's 64 bit instruction set, but is far ahead of anything from ARM or its other licencees in performance. If some
in “RISC-V isn’t as interesting as you think” · View on HN
That's the opinion of one ARM engineer I've never heard of. Here's the opinion of probably THE most important ARM engineer of the 1990s and 2000s, Dave Jaggar who developed the ARM7TDMI, Thumb, Thumb2. ▶ this video Check at 51:30 where he says "Are there any ARM snipers? No ... I would Google RISC-V and find out all about it. They've done a fine instruction set, a fine job [...] it's the state of the art now for 32-bit general purpose instruction sets. And it's got the 16-bit compressed stuff. So, yeah, learning about that, you're learning from the best."
in “Show HN: v8-riscv — Port of JavaScript V8 engine to RISC-V” · View on HN
Who says RISC-V is mediocre? Here's the opinion of probably THE most important ARM engineer of the 1990s and 2000s, Dave Jaggar who developed the ARM7TDMI, Thumb, Thumb2. ▶ this video Check at 51:30 where he says "Are there any ARM snipers? No .. I would Google RISC-V and find out all about it. They've done a fine instruction set, a fine job [...] it's the state of the art now for 32-bit general purpose instruction sets. And it's got the 16-bit compressed stuff. So, yeah, learning about that, you're learning from the best."
in “Apple M1 foreshadows Rise of RISC-V” · View on HN
That's one opinion. Another ARM engineer who contributed one heck of a lot more to ARM's success (designed ARM7TDMI, Thumb, Thumb2) says RISC-V is great. See at 51 minutes in this ▶ this video
in “ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266” · View on HN
Surprising but true! Dave Jaggar makes it clear in this video that it was to keep code within smaller Nintendo ROM size constraints. Seven year gap between ARM / Nintendo discussions and GBA appearance! ▶ this video
in “Was Acorn's RISC OS an under-appreciated pearl of OS design?” · View on HN