CppCon 2017: Fedor Pikus “C++ atomics, from basic to advanced. What do they really do?” on HackerTube: recommended by 3 Hacker News commenters across 3 separate months, 2017–2025.
talk · advanced · evergreen
Fedor Pikus's CppCon 2017 talk on C++ atomics, looking at what they let the programmer express and what the hardware actually does. It covers memory ordering and lock-free programming from basic to advanced.
HN recommends it as an enlightening explanation of atomics, caches and memory ordering from a strong presenter.
“Watching this was enlightening to say the least (and the presenter is very good)”
3 Hacker News comments link this video. Each one links back to its thread.
No, from what I understand, you can't even do it in software anyway due to how the caches work between cores inside the CPU. Watching this was enlightening to say the least (and the presenter is very good): ▶ this video
in “Designing a Lock-free, Wait-free Hash Map” · View on HN
tl;dr: In a multi-threaded context, memory reads and writes can be reordered by hardware. It gets more complicated with shared cache. Imagine that you have core 1 writing to some address at (nearly) the same time that core 2 reads from that. Does core 2 read the old or the new? Especially if they don't share the same cache -- core 1 might "write" to a given address, but it only gets written to core 1's cache and then "scheduled" to be written out to main memory. Meanwhile, later core 2 tries to read that address, it's not in its cache, so it pulls from main memory before core 1's cache has flushed. As far as core 2 is concerned, the write happened after it read from the address even though physically the write finished in core 1 before core 2's read instruction might have even started. A memory barrier tells the hardware to ensure that reads-before is also "happens-before" (or after) a given writen to the same address. It's often (but not always) a cache and memory synchronization across cores. I found Fedora Pikus's cppcon 2017 presentation [1] to be informative, and Michael Wong's 2015 presentation [0] filled in some of the gaps. C++, being a generic language for many hardware implementations, provides a lot more detailed concepts for memory ordering [2], which is important for hardwares that have more granularity in barrier types that what most people are used to with x86-derived memory models. [0]: [link] [1]: ▶ this video [2]: [link]
in “Without the futex, it's futile” · View on HN
Fedor Pikus has given a number of great talks on the subject at cppcon over the years some links, in no particular order: CppCon 2017: Fedor Pikus “C++ atomics, from basic to advanced. What do they really do? ▶ this video CppCon 2016: Fedor Pikus “The speed of concurrency (is lock-free faster?)" [link] CppCon 2015: Fedor Pikus PART 1 “Live Lock-Free or Deadlock (Practical Lock-free Programming)" [link] CppCon 2015: Fedor Pikus PART 2 “Live Lock-Free or Deadlock (Practical Lock-free Programming)” [link] CppCon 2017: Fedor Pikus “Read, Copy, Update, then what? RCU for non-kernel programmers” [link] Tony Van Eerd has also given some talks on lock free queues, I'll leave it as an exercise to the reader to search youtube :)
in “Lockfree Algorithms (2010)” · View on HN