Indistinguishable From Magic: Manufacturing Modern Computer Chips

▶ this video This talk on YouTube is the most in depth explanation of IC manufacuring I have seen. I highly recommend it to anyone, no matter their background. You really gain an appreciation of how insanely complex modern computers are. It’s from 2012 but he talks extensivly about how (2012-)future chips will be made. And most of the information is still applicable.

in “Ask HN: How modern chips are made?” · View on HN

There's a brilliant talk, given in 2009 at HOPE09, NYC titled "Indistinguishable From Magic: Manufacturing Modern Computer Chips". At roughly 36 minutes, there's a cross-section of a (in 2009) modern chip. The topmost layer is the shiny rainbowy topmost metal-layer you see on typical (from the top) die photographs. The very, very small comb-looking bottommost-layer is the individual transistors, and structures there are of the size that give a "xxx nm" process its name. ▶ this video I very much recommend everyone to watch this video, to get a sense for the complexity that goes into producing a modern CPU. To come back to the thread I'm answering here: The logic analyzer on the Alto (probing microcode) connected to interconnects of individual gates probably would be connected to signals somewhere in the lower middle of the stack in a modern CPU, I guess.

in “Xerox Alto Restoration Part 5 [video]” · View on HN

This talk on how silicon chips are manufactured, called "Indistinguishable from Magic" shows just how magical they are: ▶ this video

in “Transistors are civilization’s invisible infrastructure” · View on HN

Magic (at least as far as I'm concerned). I would love to see an updated version of this video: ▶ this video

in “200TB SSDs could come soon thanks to Micron's new chip” · View on HN

This video is in the same vein, and does a great job putting this machine into perspective in teh chip making process, but it's sadly a decade old now. ▶ this video

in “ASML, a $300B Dutch firm, makes the machines that make semiconductors” · View on HN

Yes that's pretty similar to what is used. Each mask takes days to get simulated. It is getting "old" but this great video is covering it ▶ this video

in “Light-shrinking material lets ordinary microscope see in super resolution” · View on HN

Just doing some napkin math to give myself some other context in my own head with something much smaller, die size for the Apple A14 isn't out yet, but the A13 (found in the iPhone 11 series and SE 2) is around 98mm^2 manufactured on TSMC's 2nd gen 7nm N7P. A14 might be something like that, because while it's a smaller process Apple boosted transistor count by 38% as well. Lazily/conservatively taking off 10mm on the edge for squares into a circle, that'd be about 630 chips per N5 wafer, a high enough count that chip loss rate shouldn't be too far from defect rate. Even assuming they can get 90% yield right out the gate (maybe generous) that's still about $30/chip, just for manufacturing without any R&D amortization, packaging etc. That actually seems not insignificant going by historical iPhone BOMs [1], so even for smartphones with their far far smaller SoCs 5nm at launch isn't nothing. The continued ongoing progress in silicon is just mindblowing when you dig into the details in any real way. I was blown away already watching the "Indistinguishable From Magic: Manufacturing Modern Computer Chips" [2] presentation years ago, which still seems incredible and yet that's all talking about now ancient tech. The increasing costs and design challenges though are also going to have interesting effects on the industry, as who/what has the margins to afford fabbing aggressive chips on the cutting edge might start to diverge a bit more. I also wonder how longevity will be, I remember

in “TSMC’s Wafer Prices Revealed: 300mm Wafer at 5nm Is Nearly $17,000” · View on HN

Each additional step requires solving a lot of new engineering problems and usually some new physics too, and it's not a linear process: many techniques are proposed that become cost effective only when previous techniques hit their size limits, and then a lot of research is done and most techniques are never gotten to work at scale and just a few pan out and become the next process. This is a great talk on the history of chip processes: ▶ this video This is about some of the challenges that had to be solved for a current modern process: [link]

in “Intel Ponte Vecchio GPU Will Be Made on TSMC 6nm Process, CPUs Could Be TSMC 3nm” · View on HN

Sounds like this video: Indistinguishable from magic: Manufacturing modern computer chips ▶ this video Just amazing. I wish a newer video explaining more recent technologies was available.

in “New AMD side channel attacks discovered, impacts Zen architecture” · View on HN

I can't even begin to comprehend the complexity in a contemporary CPU. Recently I saw this video [1] and only juuust started to get an inkling as to how big the problem space is. [1] ▶ this video

in “How we made the microprocessor” · View on HN

There are some exotic processes that give better performance but the economies of scale aren't there yet and the cost of production is probably always going to be much higher than that of Silicon, which is after all a very abundant element on Earth. There was a fantastic video about IC manufacturing linked here on HN a while ago, I'm not sure if I'll be able to find it. edit: Hah, found it :) ▶ this video

in “Intel Discontinues the Intel Developer Forum; IDF17 Cancelled” · View on HN

If you forgive the shameless self-promotion, I did a talk on the scale and economics and so forth a while back you might find interesting: ▶ this video It has been posted on HN a few times before...the technology still puts a tingle in my spine [insert critcism of how I need to be a better public speaker here]

in “A2: Analog Malicious Hardware [pdf]” · View on HN

I do not have the answers for your questions (and I don't think anyone can share actual failure rates), but I would direct you this video which goes over a lot of modern chip fabrication techniques, circa 2009: ▶ this video It's crazy stuff. There are wafer test machines which will interface with the wafer directly and do some testing (which are $$$$), JTAG type tests, which access parts of the chip out of band, and functional testing. Some products, like SD Cards actually have a microcontroller on board that will provide the test routines and error correction without the need of an expensive machine. Design for test is extremely important. I'm by no means an expert however, I mostly deal with JTAG and functional tests.

in “Inside Pascal: Nvidia 's Newest Computing Platform” · View on HN

This is strikingly similar to the process used in modern offset printing. As a young child, I grew up in a family printing business, and though I didn't learn all the details (I didn't really have much interest in the printing side of the business and spent most of my time in the then still very early digital prepress playing with the computers). My earliest memories of it were marked by specialists doing digital typography on specialist computers, one monitor was a green-screen where some kind of markup was entered and the other screen was a raster monitor where the output was rendered. Each block of text was "printed" on photographic paper, cut and then sent to the "layout" department where it was taped or wax adhered to a page. (If this is hard to picture, imagine taping each block of text from this page [1] onto another piece of paper in order to layout the entire page.) The process looked a bit like this [2] Then the final page was photographed in a photography room and the negative developed. On occasion a photographic "proof" would be developed to show the final page layout and make sure there weren't any artifacts from all these tiny little pieces of paper that were used to make up the text blocks. Then the negative was used as a lithographic mask to "burn" the image of the page onto a metal sheet which then went through some kind of chemical bath to etch the image onto the sheet. From that point the process was basically what's in the rest of this video [3]. And one

in “The Joy of Aluminum Foil Lithography” · View on HN